Research fellow, Rice University
Energy-efficient Machine Learning Systems for Edge and Cloud Computing
Machine learning (ML) algorithms are increasingly pervasive in tackling the data deluge of the 21st Century. Current ML systems adopt either a centralized cloud computing or a distributed mobile computing paradigm. In both paradigms, the challenge of energy efficiency has been drawing increased attention. In cloud computing, data transfer due to inter-chip, inter-board, inter-shelf and inter-rack communications (I/O interface) within data centers is one of the dominant energy costs. This will only intensify with the growing demand for increased I/O bandwidth for high-performance computing in data centers. On the other hand, in mobile computing, energy efficiency is the primary design challenge, as mobile devices have limited energy, computation and storage resources. This challenge is being exacerbated by the need to embed ML algorithms, such as convolutional neural networks (CNNs), for enabling local on-device inference capabilities.
I will present holistic system-to-circuit approaches for addressing these energy efficiency challenges. First, I will describe the design of a 4 GS/s bit-error-rate optimal analog-to-digital converter in 90nm CMOS and its use in realizing an energy-efficient 4 Gb/s serial link receiver for I/O interface. Measurement results have shown that this technique provides a promising solution to the well-known interface power bottleneck problem in data centers. Next, I will describe two techniques that can potentially enable on-device deployment of CNNs by significantly reducing the energy consumption via algorithmic/architectural innovation.
Celine Yingyan Lin is currently a research fellow at Rice University. She received the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign in 2017 and the B.S. and M.S. degrees in electrical engineering from Huazhong University of Science and Technology, Wuhan, China, in 2004 and 2007, respectively. From 2007 to 2009, she worked at China’s National Research Center for Integrated Circuits in Wuhan, where she designed analog and mixed-signal circuit IPs for TOSHIBA Microelectronics Corporation in Japan. From 2009 to 2011, she was a visiting scholar at the University of Illinois at Urbana-Champaign.
Dr. Lin’s research interests include analog and mixed-signal circuits, error resiliency techniques, and VLSI circuits and architectures for machine learning systems on resource-constrained platforms. She was the recipient of the second place Best Student Paper Award at the 2016 IEEE International Workshop on Signal Processing Systems (SiPS 2016) and the 2016 Robert T. Chien Memorial Award at UIUC for Excellence in Research.